Joseph Schutz



I have considerable experience managing complex projects from silicon to systems and am comfortable at all levels from device physics to system software.


I have a passion for technology development which leads to a leading market position with a strong and increasing revenue stream.



Skills & Abilities


Managing Complex Across-Site Projects, Microprocessor Design, Software Development, System Design, People Management, International Management Experience, Team Work with Peers



Intel LaBS, Vice President and Director

October 2011 to October 2013

I drove a Binary Translation project which resulted in the technology being transferred from Intel Labs to the product group. Various significant breakthroughs were made and a large number of patents were written. This technology permits a microprocessor to run different ISA’s simultaneously with equal performance.

Intel LaBS, Vice President and Director

October 2005 to October 2011

list of the more major accomplishments:

SSC a 48 core microprocessor with 2D on die interconnect. A system board was developed and these systems were used at over 50 universities for research.

Developed a family of emulation systems in both hardware and software for architecture research. This technology is used by Intel designers to develop cores and SOC’s. This solution speeds development time dramatically. The ATOM core was ported to this system to aid in pre-silicon validation and feature development.

Quark was developed for use in Intel SOC’s and offer significant customization options for processes in Intel or foundries. This is the IoT core used in the Intel Curie wearables product and the Clanton SOC for embedded.

P54C converted to synthesize-ability. This core was used as the basis of the Xeon Phi™ product line, previously referred to as Larrabee.

Parallel Java Script was developed and transferred to the Intel Software Group., which enables the language to take advantage of multiple cores.

Embree ray tracing technology was developed and transferred to various external companies and eventually open sourced. This technology now exists in Xeon Phiprocessors to showcase the benefit of highly parallel hardware for ray tracing applications.

Pioneering parallel HPC workload and algorithmic work on the Xeon Phiprocessors has demonstrated the value of the product in major market segments.

Intel Logic Technology development, Vice President and Director of Microprocessor Design

January 1985 to January 2005

Developed one microprocessor every two years for a total of ten microprocessors.

The first microprocessor was the second generation 386™ on 1.0 micron CMOS at 33 MHz, and was the last Pentium™ 4 family member on 65 nm at 4 GHz. The combined revenue for these products was just over $ 100 billion dollars.

I led the team that developed the original tick tock development model ultimately used to sync up microprocessor development with the silicon process timeline. This resulted in a more rapid implementation of Moore’s Law.

In addition to developing microprocessor products, this team was the first to implement a product on the new process technology each silicon process generation, so helped develop the process features which offered the most performance, and best tradeoffs for power and die size. 

Significant design issues were discovered and solved for each new process generation, which were solved with a combination of design methodologies and ground breaking use of advance CAD too features.

The eventual team size exceeded 900 engineers spread across multiple sites and time zones.

Intel Logic Technology development, Director of Design

January 1981 to January 1985

Led the development of a high volume 256K CMOS DRAM Intel sold in production. This DRAM pioneered the use of CMOS in DRAM, which resulted in ground breaking patents. When Intel later left the DRAM business those patents were a source of licensing revenue in the $ 100 million USD range. 




BSEE 1978



Member of the CENA Board. This is a nano science joint venture with the Kingdom of Saudi Arabia and Intel.    2010-2013

Member of DFKI Board a premiere research institute in machine vision, factory automation and visual computing. 2008-2011

Board Member of PSU Industry Advisory Board.  Intel rep.  2003-2007




US Citizen, Fluent in German, Blues Guitar, Woodworking, Skiing, Maker Community, Arduino, Tropical Plants, Photography, Married with two children




Dadi Perlmutter EVP,  Justin Rattner CTO, Belli Kuttanna Intel Fellow, Tom Piazza Intel Senior Fellow